TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 486

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

SPICT
(822H)
(823H)
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
(2) SPI Control Register (SPICT)
(a) CRC16_7_B
(b) CRCRX_TX_B
(c) CRCRESET_B
The SPICT register specifies data length, CRC, etc.
the CRC calculation is performed on the transmit data. Otherwise, it is performed on
the received data.
Communicati-
on
Control
0: Disable
1: Enable
CRC Select
0: CRC7
1: CRC16
This bit selects the CRC calculation algorithm from the CRC7 and CRC16.
This bit selects the data to be sent to the CRC generator. When CRCRX_TX_B = 0,
This bit is used to initialize the CRC calculation register.
CRC16_7_B
CEN
15
7
0
0
Control
0: Set to “0”
1: Set to “1”
CRC Data
0: Transmit
1: Receive
CRCRX_TX_B CRCRESET_B
SPCS
SPCS_B
R/W
14
6
1
0
Pin
Figure 3.17.6 SPICT Register
Data Length
Select
0: 8 bits
1: 16 bits
CRC
Calculation
Register
Control
0: Reset
1:Reset
UNIT16
Release
13
5
0
0
SPICT Register
92CF26A-484
Transmit
Mode Select
0: UNIT
1: Sequential
TXMOD
12
4
0
R/W
Transmission
Enable
0: Disable
1: Enable
TXE
11
3
0
Alignment
Enable in
Fullduplex
mode
0: Disable
1: Enable
FDPXE
10
2
0
Receive
Mode Select
0: UNIT
1: Sequential
RXMOD
1
9
0
Receive
Enable
0: Disable
1: Enable
TMP92CF26A
RXE
2009-06-25
0
8
0