TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 346

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

SIRCR
(1207H)
Bit symbol
Read/Write
Reset State
Function
Select
transmit
pulse
width
0: 3/16
1: 1/16
PLSEL
7
0
Receive
data
0: “H” pulse
1: “L” pulse
RXSEL
6
0
Figure 3.14.21 IrDA Control Register
Transmit
0: disable
1: enable
TXEN
5
0
92CF26A-344
Receive
0: disable
1: enable
RXEN
4
0
R/W
Select receive pulse width
Set effective pulse width to equal to more than 2x
× (value + 1) + 100ns
Can be set
Can not be set : 0, 15
SIRWD3
Select receive pulse width
Receive (recovery) operation
Transmit (modulation) operation
Select transmit pulse width
Formula: Effective pulse width ≥ 2x × (value + 1) + 100ns
0000
0001
1110
1111
to
3
0
1
0
1
0
1
0
Cannot be set
Equal or more than 4x + 100ns
Equal or more than 30x + 100ns
Can not be set
Disable receiving operation
(Received data is ignored)
Enabled receiving operation
Disabled transmission operation
(Input from SIO is ignored)
Enabled transmission operation
3/16 pulse width
1/16 pulse width
x = 1/f
: 1 to 14
SIRWD2
2
0
SYS
SIRWD1
1
0
SIRWD0
TMP92CF26A
0
0
2009-06-25