TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 369

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.16 USB Controller
3.16.1
of a USB system.
This USB controller (UDC) is designed to support a variety of serial links in the construction
The outline is as follows:
Note1:The TMP92CF26A does not include the pull-up resister necessary for D+pin. An external pull-up resistor plus
Note2:There are some differences between our specifications and USB 1.1. Refer to check “3.16.11 Notice and
(5) Built-in DPLL which generates sampling clock for receive data
(6) Detecting and generating SOP, EOP, RESUME, RESET and TIMEOUT
(7) Encoding and decoding NRZI data
(8) Inserting and discarding stuffed bit
(9) Detecting and checking CRC
(10) Generating and decoding packet ID
(11) Built-in power management function
(12) Dual packet mode supported
Outline
(1) Compliant with USB rev1.1
(2) Full-speed: 12 Mbps (low-speed (1.5 Mbps) not supported)
(3) Auto bus enumeration with 384-byte descriptor RAM
(4) Supports 3 kinds of transfer type: Control, interrupt and bulk
software support is required.
Restrictions”.
•
•
•
•
Endpoint 0:
Endpoint 1:
Endpoint 2:
Endpoint 3:
Control 64 bytes × 1-FIFO
BULK (out)
BULK (in)
Interrupt (in)
92CF26A-367
64 bytes × 2-FIFO
64 bytes × 2-FIFO
8 bytes × 1-FIFO
TMP92CF26A
2009-06-25