TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 454

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.16.9
supply condition) to suspend (Suspension) condition, and it can be returned from suspend
condition to turn on the power supply condition.
UDC.
Power Management
USB controller (UDC) can be switched from optional resume condition (turn on the power
This function can be set to low electricity consumption by operating CLK supplying for
(1) Switch to suspend condition
(2) Return from suspend condition by host resume
(3) Return from suspend condition by remote wakeup
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state. The UDC switches to suspend condition by the following process.
USB host, the UDC release SUSPEND condition, and it resets SUSPEND bit of
STATUS register to “0”. The system is thereby resumed. The resume condition output
from the host is maintained for at least 20 ms. Therefore effective protocol occurs on
USB signal line after this time has elapsed.
host. Some applications do not support remote wakeup. Remote wakeup is also
limited using from USB host by bus enumeration.
When this bit is “1”, remote wakeup can be used. Remote wakeup is not disabled by
this bit. Therefore, if this bit shows disabled, remote wakeup must not be set. If it fill
the conditions, output resume condition output to USB host by writing
USBCR1<WAKEUP> from “1” to “0” of UDC in suspend condition. And it prompts
resume from UDC to host. After UDC changes to suspend condition, WAKEUP input
is ignored for 2 ms. Therefore, remote wakeup becomes effective when
USBINTFR1<INT_SUS> is set to “1”.
The USB host can set the USB device to suspend condition by maintaining IDLE
When activity of bus on USB signal is restored by resume condition output from
Remote wakeup is system for prompt resume from suspended USB device to USB
UDC remote wakeup function can be used when it is permitted.
Setting remote wakeup by bus can be confirmed by bit7 of Current_Config register.
UDC switches to suspend condition if it detects IDLE state of more than 3 ms
(about 3.07ms) on USB signal. At this point, UDC sets SUSPEND bit of STATUS
register to “1”.
UDC renews USBINTFR1<INT_SUS> and <INT_CLKSTOP> from “0” to “1” if it
detects IDLE state of more than 5 ms (about 5.46ms) on USB signal. Afterward
reset USBCR1<USBCLKE> to “0” to stop USB clock.
In this condition, all register values into the UDC are kept. However, external
access is not possible except for reading of STATUS register, Current_Config
register, and USBINTFR1, USBINTFR2, USBINTMR1, USBINTMR2 and
USBCR1.
92CF26A-452
TMP92CF26A
2009-06-25