TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 42

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

Port Name
PC0-PC3
P40-P47
P50-P57
PL0-PL7
P10-17
P60-67
D0-7
PC4
PC5
PC6
PC7
PG2
PG3
PK0
PK1
PK2
PK3
PK4
PK5
PK6
PK7
P70
P71
P72
P73
P74
P75
P76
P80
P81
P82
P83
P84
P85
P86
P87
P90
P91
P92
P96
P97
PF0
PF1
PF2
PF3
PF4
PF5
PF7
PJ0
PJ1
PJ2
PJ3
PJ4
PJ5
PJ6
PJ7
Output Function
CS
SDCAS
CSXB
WRLU
SDRAS
WRLL
SDWE
CSZD
SDLUDQM
2
SDLLDQM
CS
CS
I2S0CKO
I2S1CKO
LVSYNC
LHSYNC
LD0-LD7
A16-A23
I2S0WS
I2S1WS
I2S0DO
I2S1DO
D8-D15
A8-A15
SDCLK
NDALE
NDCLE
SDCKE
LLOAD
LGOE0
LGOE1
LGOE2
,
SCLK0
Name
D0-D7
A0-A7
TXD0
LCP0
EA24
EA25
EA26
EA27
EA28
R/
1
CSZA SDCS
3
CSZB
CSZC
KO8
LFR
CS
MX
MY
PX
PY
RD
,
,
,
−
,
−
−
,
,
,
,
SDCS
,
CSXA
W
ND
SRWR
NDWE
ND
0
NDRE
SRLLB
SRLUB
0
1
CE
CE
16bit Start OFF
During Reset
Boot Start OFF
Boot Start OFF
16bit Start ON
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
Table 3.3.8 Output buffer State Table (1/2)
When Used as
When the CPU is operating
external write
function Pin
ON upon
ON
ON
ON
ON
−
−
−
92CF26A-40
When Used as
Output port
ON
ON
ON
ON
−
−
−
Output Buffer State
When Used as
function Pin
OFF
ON
ON
ON
ON
−
−
−
<PxDR> = 1
In HALT mode (IDLE2/1/STOP)
When Used as
Output port
ON
ON
ON
ON
−
−
−
When Used as
function Pin
OFF
OFF
OFF
OFF
−
−
−
<PxDR> = 0
TMP92CF26A
2009-06-25
When Used as
Output port
OFF
OFF
OFF
−
−
−