CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 86
![no-image](/images/manufacturer_photos/0/3/336/intel_sml.jpg)
CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
- Current page: 86 of 388
- Download datasheet (2Mb)
86
through
through
15:8
7:0
8Ah
8Bh
8Ch
Bit
Cfg
00h
85h
86h
87h
88h
89h
FFh
DRA
Access
Tech
1 Gb
1 Gb
2 Gb
2 Gb
RW-L
RW-L
Depth
rows
128 M
256 M
128 M
64 M
in
Default
Value
00h
00h
Device
Width
16
16
Channel 0 DRAM Rank-1 Attributes (C0DRA1)
This register defines DRAM pagesize/number-of-banks for
Rank 1 for given channel.
See table in register description for programming.
This register is locked by Intel ME stolen Memory lock.
Channel 0 DRAM Rank-0 Attributes (C0DRA0)
This register defines DRAM page size/number-of-banks for
Rank 0 for given channel.
See table in register description for programming.
This register is locked by Intel ME stolen Memory lock.
8
8
Address Usage
Row Bits
14
13
15
14
Reserved
Reserved
Reserved
Reserved
Column
Bits
Description
Processor Configuration Registers
10
10
10
10
Bank
Bits
3
3
3
3
512 MB
Rank
Capa
1 GB
2 GB
1 GB
city
Datasheet
Page
Size
8 KB
8 KB
8 KB
8 KB
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