CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 213

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
1.15.2
1.15.3
Datasheet
DMIPVCCAP1 - DMI Port VC Capability Register 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Describes the configuration of PCI Express Virtual Channels associated with this port.
DMIPVCCAP2 - DMI Port VC Capability Register 2
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Describes the configuration of PCI Express Virtual Channels associated with this port.
31:24
23:8
31:7
7:0
6:4
2:0
Bit
Bit
3
Access
Access
RW-O
RO
RO
RO
RO
RO
RO
0000000h
Default
Default
Value
0000h
Value
000b
000b
00h
00h
0b
Reserved for VC Arbitration Table Offset (RSVD)
Reserved
Reserved for VC Arbitration Capability (VCAC)
Reserved
Low Priority Extended VC Count (LPEVCC)
Indicates the number of (extended) Virtual Channels in
addition to the default VC belonging to the low-priority VC
(LPVC) group that has the lowest priority with respect to
other VC resources in a strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
Extended VC Count (EVCC)
Indicates the number of (extended) Virtual Channels in
addition to the default VC supported by the device.
For DMI, only the default Virtual Channel (VC0) is advertised
in the Extended VC Capability structure.
0/0/0/DMIBAR
4-7h
00000000h
RO; RW-O
32 bits
0/0/0/DMIBAR
8-Bh
00000000h
RO
32 bits
Description
Description
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