CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 359
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CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
- Current page: 359 of 388
- Download datasheet (2Mb)
Processor Configuration Registers
1.20.6
Datasheet
RTADDR_REG - Root-Entry Table Address Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Register providing the base address of root-entry table.
63:36
35:12
22:0
11:0
Bit
Bit
Access
Access
RW
RO
RO
RO
0000000h
000000h
Default
000000h
Default
Value
000h
Value
Reserved
Root Table Address (RTA)
This register points to base of page aligned, 4-KB-sized root-
entry table in system memory. Hardware may ignore and not
implement Bits 63:HAW, where HAW is the host address
width.
Software specifies the base address of the root-entry table
through this register, and programs it in hardware through
the SRTP field in the Global Command register.
Reads of this register return the value that was last
programmed to it.
Reserved
Reserved
0/2/0/GFXVTBAR
20-27h
0000000000000000h
RO; RW
64 bits
(Sheet 3 of 3)
Description
Description
359
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