CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 259

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
Datasheet
31:24
23:20
19:18
17:8
Bit
7
6
5
Access
RO
RO
RO
RO
RO
RO
RO
Default
Value
0000b
010h
00h
00b
0b
0b
0b
Number of IOTLB Invalidation Units (NIU)
This field indicates a value of N-1, where N is the number of
IOTLB invalidation units supported by hardware. Each
IOTLB invalidation unit consists of two registers: A 64-bit
IOTLB Invalidation Register (IOTLB_REG), followed by a 64-
bit Invalidation Address Register (IVA_REG).
Implementations must support at least one IOTLB
invalidation unit (NIVU = 0) for each DMA-remapping
hardware unit in the platform.
The maximum number of IOTLB invalidation register units
per DMA-remapping hardware unit is 256.
Maximum Handle Mask Value (MHMV)
The value in this field indicates the maximum supported
value for the Handle Mask (HM) field in the interrupt entry
cache invalidation descriptor (iec_inv_dsc).
This field is valid only when the IR field is reported as Set.
Reserved
Invalidation Unit Offset (IVO)
This field specifies the location to the first IOTLB invalidation
unit relative to the register base address of this DMA-
remapping hardware unit.
If the register base address is X, and the value reported in
this field is Y, the address for the first IOTLB invalidation
unit is calculated as +(16*Y).
If N is the value reported in NIU field, the address for the
last IOTLB invalidation unit is calculated as
X+(16*Y)+(16*N).
Snoop Control (SC)
0 = Hardware does not support 1-setting of the SNP field in
1 = Hardware supports the 1-setting of the SNP field in the
Pass Through (PT)
0 = Hardware does not support pass-through translation
1 = Hardware supports pass-through translation type in
Caching Hints (CH)
0 = Hardware does not support IOTLB caching hints (ALH
1 = Hardware supports IOLTB caching hints through the
the page-table entries.
page-table entries.
type in context entries.
context entries.
and EH fields in context-entries are treated as
reserved).
ALH and EH fields in context-entries.
(Sheet 2 of 3)
Description
259