CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 353
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CP80617004119AES LBU3
Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet
1.CP80617004119AES_LBU3.pdf
(388 pages)
Specifications of CP80617004119AES LBU3
Lead Free Status / RoHS Status
Compliant
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Processor Configuration Registers
1.20.4
Datasheet
GCMD_REG - Global Command Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Register to control remapping hardware. If multiple control fields in this register need
to be modified, software must serialize the modifications through multiple writes to this
register.
Bit
31
Access
RW
Default
Value
0b
Translation Enable (TE)
Software writes to this field to request hardware to enable/
disable DMA-remapping hardware.
0 = Disable DMA-remapping hardware
1 = Enable DMA-remapping hardware
Hardware reports the status of the translation enable
operation through the TES field in the Global Status register.
Before enabling (or re-enabling) DMA-remapping hardware
through this field, software must:
Refer to Section 9 for detailed software requirements.
There may be active DMA requests in the platform when
software updates this field. Hardware must enable or
disable remapping logic only at deterministic transaction
boundaries, so that any in-flight transaction is either subject
to remapping or not at all.
Hardware implementations supporting DMA draining must
drain any in-flight translated DMA read/write requests
queued within the root complex before completing the
translation enable command and reflecting the status of the
command through the TES field in the GSTS_REG.
Value returned on read of this field is undefined.
• Setup the DMA-remapping structures in memory
• Flush the write buffers (through WBF field), if write
• Set the root-entry table pointer in hardware (through
• Perform global invalidation of the context-cache and
• If advanced fault logging supported, setup fault log
0/2/0/GFXVTBAR
18-1Bh
00000000h
W; RO; RW
32 bits
buffer flushing is reported as required.
SRTP field).
global invalidation of IOTLB.
pointer (through SFL field) and enable advanced fault
logging (through EAFL field).
(Sheet 1 of 5)
Description
353
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