CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 306

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.19.3
306
ECAP_REG - Extended Capability Register
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Register to report DMA-remapping hardware extended capabilities.
63:24
23:20
19:18
2:0
Bit
Bit
3
Access
Access
RO
RO
RO
RO
RO
00000000
Default
Default
Value
Value
010b
00h
00b
0h
0b
Advanced Fault Logging (AFL)
0 = Indicates advanced fault logging not supported. Only
1 = Indicates advanced fault logging is supported.
Number of Domains Supported (ND)
for up to 16 domains.
for up to 64 domains.
for up to 256 domains.
for up to 1024 domains.
for up to 4K domains.
for up to 16K domains.
for up to 64K domains.
Reserved
Maximum Handle Mask Value (MHMV)
The value in this field indicates the maximum supported
value for the Handle Mask (HM) field in the interrupt entry
cache invalidation descriptor (iec_inv_dsc).
This field is valid only when the IR field is reported as Set.
Reserved
000b:Hardware supports 4-bit domain-ids with support
001b:Hardware supports 6-bit domain-ids with support
010b:Hardware supports 8-bit domain-ids with support
011b:Hardware supports 10-bit domain-ids with support
100b:Hardware supports 12-bit domain-ids with support
100b:Hardware supports 14-bit domain-ids with support
110b:Hardware supports 16-bit domain-ids with support
111b:Reserved.
0/0/0/DMIVC1REMAP
10-17h
0000000000001000h
RO
64 bits
primary fault logging is supported.
(Sheet 5 of 5)
(Sheet 1 of 3)
Processor Configuration Registers
Description
Description
Datasheet