CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 3

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Contents
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Datasheet
Processor Configuration Registers ........................................................................... 12
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
Register Terminology ......................................................................................... 12
System Address Map.......................................................................................... 14
1.2.1
1.2.2
1.2.3
1.2.4
1.2.5
1.2.6
1.2.7
1.2.8
1.2.9
Configuration Process and Registers..................................................................... 39
1.3.1
Configuration Mechanisms .................................................................................. 40
1.4.1
1.4.2
Routing Configuration Accesses ........................................................................... 42
1.5.1
1.5.2
Processor Register Introduction ........................................................................... 45
I/O Mapped Registers ........................................................................................ 46
PCI Device 0 ..................................................................................................... 46
1.8.1
1.8.2
1.8.3
1.8.4
1.8.5
1.8.6
1.8.7
1.8.8
1.8.9
1.8.10 SID - Subsystem Identification ................................................................. 55
1.8.11 CAPPTR - Capabilities Pointer ................................................................... 55
1.8.12 PXPEPBAR - PCI Express Egress Port Base Address ..................................... 56
1.8.13 MCHBAR - Processor Memory Mapped Register Range Base.......................... 57
1.8.14 GGC - Processor Graphics Control Register................................................. 58
1.8.15 DEVEN - Device Enable ........................................................................... 62
1.8.16 DMIBAR - Root Complex Register Range Base Address ................................ 63
1.8.17 LAC - Legacy Access Control .................................................................... 64
1.8.18 REMAPBASE - Remap Base Address Register .............................................. 66
1.8.19 REMAPLIMIT - Remap Limit Address Register ............................................. 66
1.8.20 TOM - Top of Memory ............................................................................. 67
1.8.21 TOUUD - Top of Upper Usable DRAM ......................................................... 68
1.8.22 GBSM - Graphics Base of Stolen Memory ................................................... 69
1.8.23 BGSM - Base of GTT Stolen Memory.......................................................... 70
1.8.24 TSEGMB - TSEG Memory Base.................................................................. 71
1.8.25 TOLUD - Top of Low Usable DRAM ............................................................ 71
Legacy Address Range ............................................................................ 17
Main Memory Address Range (1 MB - TOLUD) ............................................ 19
Main Memory Address Space (4 GB to TOUUD) ........................................... 27
PCI Express* Configuration Address Space ................................................ 34
PCI Express Graphics Attach (PEG) ........................................................... 34
Graphics Memory Address Ranges ............................................................ 35
System Management Mode (SMM) ............................................................ 36
SMM and VGA Access through GTT TLB .................................................... 37
I/O Address Space.................................................................................. 37
Platform Configuration Structure .............................................................. 39
Standard PCI Configuration Mechanism ..................................................... 40
PCI Express Enhanced Configuration Mechanism......................................... 40
Internal Device Configuration Accesses...................................................... 43
Bridge Related Configuration Accesses ...................................................... 44
VID - Vendor Identification ...................................................................... 48
DID - Device Identification....................................................................... 48
PCICMD - PCI Command ......................................................................... 49
PCISTS - PCI Status ............................................................................... 51
RID - Revision Identification .................................................................... 52
CC - Class Code ..................................................................................... 53
MLT - Master Latency Timer ..................................................................... 54
HDR - Header Type................................................................................. 54
SVID - Subsystem Vendor Identification .................................................... 54
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