CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 178

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.13.35
178
DCAP - Device Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Indicates PCI Express device capabilities.
31:16
14:6
4:3
2:0
Bit
15
5
Access
RO
RO
RO
RO
RO
RO
Default
0000h
Value
000h
000b
00b
1b
0b
Reserved
Not Applicable or Implemented. Hard wired to 0.
Role-Based Error Reporting (RBER)
Indicates that this device implements the functionality
defined in the Error Reporting ECN as required by the PCI
Express Base spec.
Reserved
Not Applicable or Implemented. Hard wired to 0.
Extended Tag Field Supported (ETFS)
Phantom Functions Supported (PFS)
Not Applicable or Implemented. Hard wired to 0.
Max Payload Size (MPS)
Transaction Layer Packets (TLP).
hard wired to indicate support for 5-bit Tags as a Requestor.
hard wired to indicate 128B max supported payload for
0/1/0/PCI
A4-A7h
00008000h
RO
32 bits
Processor Configuration Registers
Description
Datasheet