CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 192

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

192
9:8
7:6
Bit
5
4
Access
RO
RO
RO
RO
Default
Value
00b
00b
0b
0b
Reserved Power Indicator Control (PIC)
If a Power Indicator is implemented, writes to this field set
the Power Indicator to the written state. Reads of this field
must reflect the value from the latest write, even if the
corresponding hot-plug command is not complete, unless
software issues a write without waiting for the previous
command to complete in which case the read value is
undefined.
00:Reserved
01:On
10:Blink
11:Off
If the Power Indicator Present bit in the Slot Capabilities
register is 0b, this field is permitted to be read-only with a
value of 00b.
Reserved for Attention Indicator Control (AIC)
If an Attention Indicator is implemented, writes to this field
set the Attention Indicator to the written state. Reads of this
field must reflect the value from the latest write, even if the
corresponding hot-plug command is not complete, unless
software issues a write without waiting for the previous
command to complete in which case the read value is
undefined. If the indicator is electrically controlled by chassis,
the indicator is controlled directly by the downstream port
through implementation specific mechanisms.
00:Reserved
01:On
10:Blink
11:Off
If the Attention Indicator Present bit in the Slot Capabilities
register is 0b, this field is permitted to be read only with a
value of 00b.
Reserved for Hot-Plug Interrupt Enable (HPIE)
When set to 1b, this bit enables generation of an interrupt on
enabled hot-plug events Default value of this field is 0b. If the
Hot Plug Capable field in the Slot Capabilities register is set to
0b, this bit is permitted to be read-only with a value of 0b.
Reserved for Command Completed Interrupt Enable
(CCI)
If Command Completed notification is supported (as indicated
by No Command Completed Support field of Slot Capabilities
Register), when set to 1b, this bit enables software
notification when a hot-plug command is completed by the
Hot-Plug Controller.
Default value of this field is 0b.
If Command Completed notification is not supported, this bit
must be hard wired to 0b.
(Sheet 2 of 3)
Description
Processor Configuration Registers
Datasheet