CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 246

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.16.31
1.16.32
246
PMCAPID - Power Management Capabilities ID
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
PMCAP - Power Management Capabilities
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
15:11
15:8
7:0
Bit
8:6
Bit
10
9
5
4
3
Access
Access
RO
RO
RO
RO
RO
RO
RO
RO
RO
Default
Default
Value
000b
Value
00h
A4h
01h
0b
0b
1b
0b
0b
PME Support (PMES)
This field indicates the power states in which the IGD may
assert PME#. Hard wired to 0 to indicate that the IGD does
not assert the PME# signal.
D2 Support (D2)
The D2 power management state is not supported. This bit is
hard wired to 0.
D1 Support (D1)
state is not supported.
Reserved
Device Specific Initialization (DSI)
IGD is required before generic class device driver is to use it.
Reserved
PME Clock (PMECLK)
generation.
hard wired to 0 to indicate that the D1 power management
hard wired to 1 to indicate that special initialization of the
hard wired to 0 to indicate IGD does not support PME#
Next Capability Pointer (NEXT_PTR)
This contains a pointer to the next item in the capabilities
list.
Capability Identifier (CAP_ID)
SIG defines this ID is 01h for power management.
0/2/0/PCI
D0-D1h
A401h
RO
16 bits
0/2/0/PCI
D2-D3h
0022h
RO
16 bits
(Sheet 1 of 2)
Description
Processor Configuration Registers
Description
Datasheet