CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 142

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.10.26
142
TSFUSE - Thermal Sensor Fuses
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register reads the thermal sensor fuses.
Calibration is a linear model of the form y=Mx-B where
The hardware uses either the 8-bit mode by default, or the 10-bit mode when enabled
in TS10BITMCTRL.
31:24
23:16
15:8
7:4
3:0
7:0
Bit
Bit
12
11
10
y is the calibrated temperature,
M is the slope correction factor,
x is the raw temperature from the thermal sensor,
B is the intercept at the y axis, a constant offset.
9
8
Access
Access
RW
RW
RW
RW
RW
RW
RO
RO
RO
RO
RO
Default
Default
Value
Value
00h
00h
00h
00h
0b
0b
0b
0b
0b
0h
0h
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
OVIDR3F (OVID Range 3 Fuses)
Offset to the Voltage Identifier value to use when
operating graphics render at LFM. The MSB is the sign bit
Thermal Sensor M-fuse value (slope) for 8-bit
mode (TS8BITSLOPE)
Software reads the fuse value directly for temperature
calibration correction.
Thermal Sensor B-fuse value (intercept) for 8-bit
mode (TS8BITINTCPT)
Software reads the fuse value directly for temperature
calibration correction.
0/0/0/MCHBAR
1020-1023h
00000000h
32 bits
RO
(Sheet 2 of 2)
Processor Configuration Registers
Description
Description
Datasheet