CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 78

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.8.33
1.9
78
Channel Size Mapping
Channel Decode Misc.
Channel 0 DRAM Rank
Boundary Address 0
Channel 0 DRAM Rank
Boundary Address 1
Channel 0 DRAM Rank
Boundary Address 2
Channel 0 DRAM Rank
Boundary Address 3
Channel 0 DRAM Rank
0,1 Attribute
Channel 0 DRAM Rank
2,3 Attribute
Channel 0 CYCTRK
PCHG
Channel 0 CYCTRK ACT
Channel 0 CYCTRK WR
Channel 0 CYCTRK
READ
Channel 0 CYCTRK
REFR
Channel 0 Refresh
Control
Table 4.
Register Name
CAPID0 - Capability Identifier
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Control of bits in this register are for capability SKU differentiation.
Device 0 MCHBAR DRAM Controls
Device 0 MCHBAR DRAM Controls Summary (Sheet 1 of 2)
95:0
Bit
CSZMAP
CHDECMISC
C0DRB0
C0DRB1
C0DRB2
C0DRB3
C0DRA01
C0DRA23
C0CYCTRKPCHG
C0CYCTRKACT
C0CYCTRKWR
C0CYCTRKRD
C0CYCTRKREFR
C0REFCTRL
Access
RO
Register
Symbol
Default
Value
Register Start
Reserved
200
202
204
206
208
20A
250
25B
2B9
100
111
252
256
258
0/0/0/PCI
E0-EBh
0000000200000000010C0009h
RO
96 bits
Description
Register End
2BA
107
111
201
203
205
207
209
20B
251
255
257
25A
25C
Processor Configuration Registers
000h
00h
0000h
0000h
0000h
0000h
0000h
0000h
0000h
00000000h
0000h
000000h
0000h
0618h
0000000000000
Default Value
RW-L
RW-L; RO
RO; RW-L
RO; RW-L
RO; RW-L
RW-L; RO
RW-L
RW-L
RO; RW
RO; RW
RW
RW; RO
RO; RW
RO; RW
Access
Datasheet