CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 118

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

1.10.3
118
TR1 - Thermometer Read 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register generally provides the un-calibrated counter value from the thermometer
circuit when the Thermometer mode is enabled. See the temperature tables for the
temperature calculations.
Bit
7:0
Bit
2
1
0
Access
Access
RO
RO
RO
RO
Default
Default
Value
Value
FFh
0b
0b
0b
Thermometer Reading (TR)
Provides the current counter value. The current counter value
corresponds to thermal sensor temperature if TSS
[Thermometer mode Output Valid] = 1.
This register has a straight binary encoding that will range
from 00h to FFh.
Note: when thermometer mode is disabled via TERATE
register, TR will read FFh
Aux2 Trip Indicator (A2TI)
A 1 indicates that the internal thermal sensor temperature is
above the Aux2 setting.
Aux1 Trip Indicator (A1TI)
A 1 indicates that the internal thermal sensor temperature is
above the Aux1 setting.
Aux0 Trip Indicator (A0TI)
A 1 indicates that the internal thermal sensor temperature is
above the Aux0 setting.
0/0/0/MCHBAR
1006h
FFh
RO
8 bits
(Sheet 2 of 2)
Description
Processor Configuration Registers
Description
Datasheet