CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 195

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
Datasheet
Bit
3
2
1
0
Access
RWC
RO
RO
RO
Default
Value
0b
0b
0b
0b
Presence Detect Changed (PDC)
A pulse indication that the inband presence detect state has
changed. This bit is set when the value reported in Presence
Detect State is changed.
Reserved for MRL Sensor Changed (MSC)
If an MRL sensor is implemented, this bit is set when a MRL
Sensor state change is detected. If an MRL sensor is not
implemented, this bit must not be set.
Reserved for Power Fault Detected (PFD)
If a Power Controller that supports power fault detection is
implemented, this bit is set when the Power Controller detects
a power fault at this slot. Note that, depending on hardware
capability, it is possible that a power fault can be detected at
any time, independent of the Power Controller Control setting
or the occupancy of the slot. If power fault detection is not
supported, this bit must not be set.
Reserved for Attention Button Pressed (ABP)
If an Attention Button is implemented, this bit is set when the
attention button is pressed. If an Attention Button is not
supported, this bit must not be set.
(Sheet 3 of 3)
Description
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