CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 354

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

354
Bit
30
29
Access
RO
W
Default
Value
0b
0b
Set Root Table Pointer (SRTP)
Software sets this field to set/update the root-entry table
pointer used by hardware. The root-entry table pointer is
specified through the Root-entry Table Address register.
Hardware reports the status of the “root table pointer set”
operation through the RTPS field in the Global Status
register.
The root table pointer set operation must be performed
before enabling or re-enabling (after disabling) DMA
remapping through the TE field.
After a “root table pointer set” operation, software must
globally invalidate the context cache and then globally
invalidate the IOTLB. This is required to ensure hardware
uses only the remapping structures referenced by the new
root table pointer, and not any stale cached entries.
While DMA remapping is active, software may update the
root table pointer through this field. However, to ensure
valid in-flight DMA requests are deterministically remapped,
software must ensure that the structures referenced by the
new root table pointer are programmed to provide the same
remapping results as the structures referenced by the
previous root-table pointer.
Clearing this bit has no effect. The value returned on a read
of this field is undefined.
Set Fault Log (SFL)
This field is valid only for implementations supporting
advanced fault logging.
Software sets this field to request hardware to set/update
the fault-log pointer used by hardware.
The fault-log pointer is specified through Advanced Fault Log
register.
Hardware reports the status of the fault log set operation
through the FLS field in the Global Status register.
The fault log pointer must be set before enabling advanced
fault logging (through EAFL field). Once advanced fault
logging is enabled, the fault log pointer may be updated
through this field while DMA remapping is active.
Clearing this bit has no effect.
The value returned on read of this field is undefined.
(Sheet 2 of 5)
Processor Configuration Registers
Description
Datasheet