CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 325

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CP80617004119AES LBU3

Manufacturer Part Number
CP80617004119AES LBU3
Description
Manufacturer
Intel
Datasheet

Specifications of CP80617004119AES LBU3

Lead Free Status / RoHS Status
Compliant
Processor Configuration Registers
Datasheet
30:1
Bit
31
0
Access
RW
RO
RO
00000000h
Default
Value
0b
0b
Enable Protected Memory (EPM)
This field controls DMA accesses to the protected low-
memory and protected high-memory regions.
0 = Protected memory regions are disabled.
1 = Protected memory regions are enabled.
DMA requests accessing protected memory regions are
handled as follows:
Remapping hardware access to the remapping structures
are not subject to protected memory region checks.
DMA requests blocked due to protected memory region
violation are not recorded or reported as remapping faults.
Hardware reports the status of the protected memory
enable/disable operation through the PRS field in this
register. Hardware implementations supporting DMA
draining must drain any in-flight translated DMA requests
queued within the Root-Complex before indicating the
protected memory region as enabled through the PRS
field.
Reserved
Protected Region Status (PRS)
This field indicates the status of protected memory region.
0 = Protected memory region(s) not enabled.
1 = Protected memory region(s) enabled.
• When DMA remapping is not enabled, all DMA requests
• When DMA remapping is enabled:
• DMA requests processed as pass-through (Translation
• DMA requests with translated address (AT=10b) and
• DMA requests that are subject to address remapping,
accessing protected memory regions are blocked.
Type value of 10b in Context-Entry) and accessing the
protected memory regions are blocked.
accessing the protected memory regions are blocked.
and accessing the protected memory regions may or
may not be blocked by hardware. For such requests,
software must not depend on hardware protection of
the protected memory regions, and instead program
the DMA-remapping page-tables to not allow DMA to
protected memory regions.
Description
325

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