CP80617004119AES LBU3 Intel, CP80617004119AES LBU3 Datasheet - Page 313

• Manufacturer Part Number: CP80617004119AES LBU3
• Manufacturer: Intel

Specifications of CP80617004119AES LBU3

• Lead Free Status / RoHS Status: Compliant

Processor Configuration Registers
Datasheet
22:0
Bit
29
28
27
26
25
24
23
Access
RO
RO
RO
RO
RO
RO
RO
RO
000000h
Default
Value
0b
0b
0b
0b
0b
0b
0b
Fault Log Status (FLS)
This field is cleared by hardware when software sets the SFL
field in the Global Command register. This field is set by
hardware when hardware completes the set fault-log pointer
operation using the value provided in the Advanced Fault Log
register.
Advanced Fault Logging Status (AFLS)
This field is valid only for implementations supporting
advanced fault logging.
This field indicates advanced fault logging status.
0 = Advanced Fault Logging is not enabled
1 = Advanced Fault Logging is enabled
Write Buffer Flush Status (WBFS)
This bit is valid only for implementations requiring write
buffer flushing.
This field indicates the status of the write buffer flush
operation. This field is set by hardware when software sets
the WBF field in the Global Command register. This field is
cleared by hardware when hardware completes the write
buffer flushing operation.
Queued Invalidation Enable Status (QIES)
This field indicates queued invalidation enable status.
0 = queued invalidation is not enabled
1 = queued invalidation is enabled
Interrupt Remapping Enable Status (IRES)
This field indicates the status of Interrupt-remapping
hardware.
0 = Interrupt-remapping hardware is not enabled
1 = Interrupt-remapping hardware is enabled
Interrupt Remapping Table Pointer Status (IRTPS)
This field indicates the status of the interrupt remapping
table pointer in hardware.
This field is cleared by hardware when software sets the
SIRTP field in the Global Command register. This field is Set
by hardware when hardware completes the set interrupt
remap table pointer operation using the value provided in the
Interrupt Remapping Table Address register.
Compatibility Format Interrupt Status (CFIS)
This field indicates the status of Compatibility format
interrupts on Intel®64 implementations supporting
interrupt-remapping. The value reported in this field is
applicable only when interrupt-remapping is enabled and
extended interrupt mode (x2APIC mode) is disabled.
0 = Compatibility format interrupts are blocked.
1 = Compatibility format interrupts are processed as pass-
Reserved
through (bypassing interrupt remapping).
(Sheet 2 of 2)
Description
313