TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 9

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

2.3
D0 to D7
P10 to P17
D8 to D15
P20 to P27
A16 to A23
A8 to A15
A0 to A7
PZ2
PZ3
R/
P56
P60
P61
P62
P63
P64
EA24
P65
EA25
RD
HWR
SRWR
CS
CS
CS
CS
CS
CS
SRLB
CS
SRUB
WR
WAIT
Pin Name
W
1
0
2
2
3
2
2
B
C
A
Pin Names and Functions
The names of the input/output pins and their functions are described below.
Number
of Pins
8
8
8
8
8
1
1
1
1
1
1
1
1
1
1
1
Table 2.3.1 Pin Names and Functions (1/3)
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Data (lower): bits 0 to 7 of data bus
Port 1: I/O port that allows I/O to be selected at the bit level
(When used to the external 8bit bus)
Data (upper): Bits 8 to15 of data bus
Port 2: Output port
Address: Bits 16 to 23 of address bus
Address: Bits 8 to 15 of address bus
Address: Bits 0 to 7 of address bus
Read: Strobe signal for reading external memory
Write: Strobe signal for writing data to pins D0 to D7
Port Z2: I/O port (with pull-up resistor)
High Write: Strobe signal for writing data to pins D8 to D15
Port Z3: I/O port (with pull-up resistor)
Read/Write: 1 represents read or dummy cycle; 0 represents write cycle.
Write: Strobe signal for writing data to pins D0 to D15 for SRAM
Port 56: I/O port (with pull-up resistor)
Wait: Pin used to request CPU bus wait
Port 60:Output port
Chip select 0: Outputs 0 when address is within specified address area.
Port 61:Output port
Chip select 1: Outputs 0 when address is within specified address area
Port 62: Output port
Chip select 2: Outputs 0 when address is within specified address area
Expand chip select: 2A: Outputs 0 when address is within specified address
area
Port 63:Output port
Chip select 3: Outputs 0 when address is within specified address area
Port 64: Output port
Chip select 24: Outputs 0 when address is within specified address area
Expand chip select: 2B: Outputs 0 when address is within specified address
area
Low byte enable for SRAM
Port 65: Output port
Chip select 25: Outputs 0 when address is within specified address area
Expand chip select: 2C: Outputs 0 when address is within specified address
area
High byte enable for SRAM
91C025-7
Functions
TMP91C025
2007-02-28