TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 57

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

Note 1: Port1 is only use for port or DATA bus (D8 to D15) by setting AM1 and AM0 pins.
Note 2: In case using P80 to P83 for analog input ports of AD converter, set to ADMOD1<ADCH2:0>.
Note 3: In case using P83 for
Note 4: As for input ports of SIO0 and SIO1: (TXD0, RXD0, SCLK0,
Port C
Port D
Port Z
Port
Pn of each port.
CTS
PC0 to PC5
PC0
PC1
PC2
PC3
PC4
PC5
PD0 to PD7
PD0
PD1
PD2
PD3
PD4
PD7
PZ2 to PZ3
PZ2
PZ3
1
Pin Name
), logical selection for output data or input data is determined by the output latch register
Table 3.5.3 I/O Registers and Specifications (2/2)
Input port
Output port
TXD0 output
RXD0 input
SCLK0 input
SCLK0 output
TXD1 output
RXD1 input
SCLK1 input
SCLK1 output
Output port
D1BSCP output
D2BLP output
D3BFR output
DLEBCD output
DOFFB output
MLDALM output
Input port
Output port
R/
CTS
CTS
HWR
SRWR
W
1
0
output
output
input
input
ADTRG
output
Specification
input port, set to ADMOD1<ADTRGE>.
91C025-55
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
Pn
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
1
1
1
1
1
1
1
1
I/O Register
PnCR
CTS
None
0
1
1
0
0
1
0
1
0
0
1
0
0
1
1
0
1
0
, TXD1, RXD1, SCLK1,
PnFC PnFC2
None
None
X: Don’t care
0
0
1
0
1
0
1
0
1
0
0
1
1
1
1
1
1
0
0
1
1
1
TMP91C025
None
2007-02-28