TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 207

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
(Setting example)
In case of use 240 SEG × 240 COM, 8bit bus width LCD driver.
TMP91C025
DLEBCD
D1BSCP
D7 to D0
D3BFR
D2BLP
DOFF
Figure 3.14.5 Interface Example for Shift Register Type LCD Driver
Note: Other circuit is necessary for LCD drive power supply for LCD driver display.
Common
Relation Display Panel and Display Memory (In case of above setting)
119
240
VDD
VSS
1
2
3
In case of store 7200 bytes transfer data to LCD
driver in built-in RAM (1000H to 2c1FH).
LD
LD
LD
LD
LD
LD
D0 D1 D2 D3 D4 D5 D6 D7
1
T6C13B
(240-row driver selection)
2 3
4
101eH
1000H
5
VDD
VSS
DIR
TEST
Di7-Di0
DUAL
SCP
S/C
VCCL/R, V0L/R,
V1L/R, V4L/R,
V5L/R
(PDCR), 1FH
(LCDSAL), 11H
(LCDSAH), 00H
(LCDSIZE), 96H
(LCDFFP), 308
(LCDCTL), 81H
6
7
8
9 10 11 …
VSS
91C025-206
1001H
O001
O240
Open
COM240
SCP
LP
FR
DSPOF
DI7 to DI0
EIO1
EIO2
VDD
COM001
VSS
T6C13B
(240-column driver selection)
; Select SR mode
; f
; Setting control terminal
; Source start address = 1000H
; 240SEG × 240COM
; BYTE mode f
; LCDON, Transfer start
101dH
2c1fH
FP
240 COM × 240 SEG
Segment
= 70.93 Hz
239 240
LCD
FP
= 70.93 Hz,
TMP91C025
2007-02-28

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