TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 19
TMP91xy25FG
Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet
1.TMP91XY25FG.pdf
(260 pages)
Specifications of TMP91xy25FG
Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
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Symbol
DFMCR0
DFMCR1
1. It’s prohibited to execute DFM enable/disable control in the SLOW mode (fs)
2. If you stop DFM operation during using DFM(DFMCR0<ACT1:0> = “10”), you shouldn’t
3. If you stop high-frequency oscillator during using DFM (DFMCR0<ACT1:0> = “10”), you
Limitation point on the use of DFM
DFM
control
register 0
DFM
control
register 1
Name
(write to DFMCR0<ACT1:0> = “10”). You should control DFM in the NORMAL mode.
execute that change the clock f
the above execution should be separated into two procedures as showing below.
should stop DFM before you stop high-frequency oscillator.
Please refer to 3.3.5 Clock Doubler (DFM) for the Details.
Address
E8H
E9H
00
01
10
11
LD
LD
ACT1
R/W
R/W
STOP
RUN
RUN
RUN
DFM LUP select f
D7
0
7
0
STOP
RUN
STOP
STOP
(DFMCR0), C0H
(DFMCR0), 00H
Figure 3.3.4 SFRs for DFM
f
f
f
f
ACT0
OSCH
OSCH
DFM
OSCH
R/W
R/W
D6
6
0
0
DFM
FPH
Input frequency 4 to 9 MHz (at 3.0 V to 3.6 V): write 0BH
Input frequency 4 to 6.75 MHz (at 2.7 V to 3.6 V): write 0BH
91C025-17
to f
Lock up
status Flag
0: End
1: Not end
DLUPFG
R/W
OSCH
D5
5
R
0
0
and stop the DFM at the same time. Therefore
Lock up
Time
0: 2
1: 2
DLUPTM
12
10
R/W
R/W
D4
4
0
/f
/f
1
DFM revision
OSCH
OSCH
;
;
DFM stop
Change the clock f
R/W
D3
3
0
R/W
D2
2
0
DFM
to f
R/W
D1
OSCH
1
1
TMP91C025
2007-02-28
R/W
D0
0
1
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