TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 137

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
(12) Timing generation
a. In UART mode
b. I/O interface
Interrupt Timing
Framing Error Timing
Parity Error Timing
Overrun Error Timing
Interrupt Timing
Transmission
Interrupt
Timing
Receiving
Interrupt
Timing
Note: In 9-Bit and 8-Bit+Parity mode, interrupts coincide with the ninth bit pulse.Thus, when servicing the
Receiving
Transmitting
interrupt, it is necessary to wait for a 1-bit period (to allow the stop bit to be transferred) to allow checking
for a framing error.
Mode
Mode
SCLK output mode
SCLK input mode
SCLK output mode
SCLK input mode
Center of last bit.
(Bit8)
Center of stop bit.
Center of last bit.
(Bit8)
Just before stop bit is
transmitted.
9 Bits
9 Bits
91C025-135
Immediately after last bit data. (See Figure 3.9.19.)
Immediately after rise of last SCLK signal rising mode, or
immediately after fall in falling mode. (See Figure 3.9.20.)
Timing used to transfer received to data receive buffer 2 (SC0BUF)
(e.g. immediately after last SCLK). (See Figure 3.9.21.)
Timing used to transfer received data to receive buffer 2 (SC0BUF)
(e.g. immediately after last SCLK). (See Figure 3.9.22.)
Center of last bit.
(Parity bit)
Center of stop bit.
Center of last bit.
(Parity bit)
Center of last bit.
(Parity bit)
Just before stop bit is
transmitted.
8 Bits + Parity
8 Bits + Parity
8 Bits, 7 Bits + Parity, 7 Bits
8 Bits, 7 Bits + Parity, 7 Bits
Center of stop bit.
Center of stop bit.
Center of stop bit.
Center of stop bit.
Just before stop bit is
transmitted.
TMP91C025
2007-02-28

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