TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 150

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

(4) Mode 3 (9-bit UART mode)
Note: The TXD pin of each slave controller must be in open-drain output mode.
TXD
Main settings
Interrupt processing
bit cannot be added.
case of receiving it is stored in SC0CR<RB8>. When the buffer is written and read, the
MSB is read or written first, before the rest of the SC0BUF data.
X: Don’t care, −: No change
PCCR
SC0MOD ← − 0 1 X 1 0 0 1
SC0CR
BR0CR
INTES0
Acc
if Acc
Acc
9-bit UART mode is selected by setting SC0MOD0<SM1:0> to 11. In this mode parity
In the case of transmission the MSB (9th bit) is written to SC0MOD0<TB8>. In the
Wakeup function
Master
setting SC0MOD0<WU> to 1. The interrupt INTRX0 occurs only when<RB8> = 1.
In 9-bit UART mode, the wakeup function for slave controllers is enabled by
∗ Clock state
← − − − − − − 0 −
← X 0 1 X X X 0 0
← 0 0 0 1 0 1 0 1
← − − − − 1 1 0 0
← SC0BUF
← SC0CR AND 00011100
≠ 0 then ERROR
Figure 3.9.23 Serial Link Using Wakeup Function
RXD
System clock: High-frequency (fc)
Clock gear: 1 (fc)
Prescaler clock: f
7 6 5 4 3 2 1 0
TXD
FPH
Slave 1
91C025-148
RXD
Set PC1 to function as the RXD0 pin.
Enable receiving in 8-bit UART mode.
Add even parity.
Set the transfer rate to 9600 bps.
Enable the INTRX0 interrupt and set it to interrupt level 4.
Read the received data.
Check for errors.
TXD
Slave 2
RXD
TXD
TMP91C025
Slave 3
2007-02-28
RXD