TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 222

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

3.16 Hardware Standby Function
Note 1:
Note 2: Shifting time is 2 to 10 clock times of f
Note: Settings of SYSCR2<DRVE> and <SELDRV> at HALT mode are effective as well as PS condition.
PS condition
Power save condition
Reset condition
(Release PS mode)
Shifting time
(Note 2
HALT Mode Setting
PS
RESET
f
protect from program runaway by supplying power voltage down. Especially, it’s useful in case
of battery using.
SYS
write SYSCR2<PSENV> to 1.
PS
TMP91C025 have hardware standby circuit that is able to save the power consumption and
It can be shifted to “PS condition” by fixing
Figure 3.16.1 shows timing diagram of transition of PS condition below.
PS mode can be released only by external RESET.
(
Note1)
pin is effective after RESET because SYSCR2<PSENV> to 0. If you use as INT0 pin, please
Table 3.16.1 Power Save Conditions of Each HALT Mode
Figure 3.16.1 Hardware Standby Timing Diagram
IDLE1 mode
+ High-frequency stop
IDLE2
91C025-221
SYS
.
IDLE1 mode
+ High-frequency stop
PS
pin to “Low” level.
Keep to
IDLE1
PS
pin
STOP mode
More than 10 clock
STOP
TMP91C025
2007-02-28