TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 15

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
3.3
Triple Clock Function and Standby Function
noise-reduction circuit. It is used for low-power and low-noise systems.
TMP91C025 contains
This chapter is organized as follows:
3.3.1
3.3.2
3.3.3
3.3.4
3.3.5
3.3.6
3.3.7
Block Diagram of System Clock
SFRs
System Clock Controller
Prescaler Clock Controller
Clock Doubler (DFM)
Noise reducing Circuit
Standby Controller
a clock gear, clock doubler (DFM), standby controller and
91C025-13
TMP91C025
2007-02-28

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