TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 20

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
EMCCR1
(00E4H)
EMCCR2
(00E5H)
EMCCR3
(00E6H)
EMCCR0
(00E3H)
Note1:
Note2:
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
When getting access to the logic address 000000H to 000FDFH, A0 to A23 holds the previous address of
external access.
In case restarting the oscillator in the stop oscillation state (e.g. Restart the oscillator in STOP mode), set
EMCCR0<DRVOSCH>, <DRVOSCL>=”1”.
PROTECT TA3LCDE
Protect flag
0: Off
1: On
Switching the protect ON/OFF by write to following 1st-KEY, 2nd-KEY
1st-KEY: EMCCR1 = 5AH, EMCCR2 = A5H in succession write
2nd-KEY: EMCCR1 = A5H, EMCCR2 = 5AH in succession write
7
R
0
LCDC source
CLK
0: 32 kHz
1: TA3OUT
CS1A area
detect control
0: Disable
1: Enable
ENFROM
Figure 3.3.5 SFRs for Noise Reduction
R/W
R/W
6
0
0
Address hold
0: Disable
1: Enable
CS2B-2C
area detect
control
0: Disable
1: Enable
ENDROM
AHOLD
R/W
R/W
5
0
0
(Note)
91C025-18
Melody/alarm
source clock
0: 32 kHz
1: TA3OUT
CS2A area
detect control
0: Disable
1: Enable
TA3MLDE
ENPROM
R/W
R/W
4
0
0
Always
write 0.
R/W
3
0
1: External
CS1A write
operation flag
When reading
0: Not written
1: Written
FFLAG
EXTIN
clock
R/W
R/W
2
0
0
fc oscillator
driver ability
1: Normal
0: Weak
CS2B-2C write
operation
flag
DRVOSCH
DFLAG
R/W
R/W
1
1
0
When writing
0: Clear flag
fs oscillator
driver ability
1: Normal
0: Weak
CS2A write
operation
flag
DRVOSCL
PFLAG
TMP91C025
R/W
R/W
0
2007-02-28
1
0

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