TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 79

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

PC
(0023H)
PCCR
(0026H)
PCFC
(0027H)
PCODE
(0028H)
Note 1: Read-modify-write is prohibited for the registers PCCR, PCFC and PCODE.
Note 2: PC1/RXD0, PC4/RXD1 pins do not have a register changing port/function. For example, when it is used as an
Bit symbol
Read/Write
Bit symbol
Read/Write
After reset
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
After reset
Function
input port, the input signal is inputted to SIO as the cereal receive data.
7
7
7
7
6
6
6
6
Figure 3.5.26 Registers for Port C
0: Port
1: SCLK1
Port C Functon Register
Port C Control Register
Port C ODE Register
PC5C
PC5F
output
PC5
W
5
5
5
5
0
0
Port C Register
91C025-77
Data from external port (Output latch register is set to 1).
PC4C
PC4
4
4
4
4
0
0: Port
1: TXD1
TXD1
0: CMOS
1: Open
ODEPC3
0: Input
PC3C
drain
PC3F
PC3
W
W
3
3
3
3
0
0
0
R/W
W
1: Output
0: Port
1: SCLK0
PC2C
PC2F
output
PC2
W
2
2
2
2
0
0
PC1C
PC1
1
1
1
1
0
0: Port
1: TXD0
TXD0
0: CMOS
1: Open
ODEPC0
PC0C
PC0F
drain
TMP91C025
PC0
W
W
0
0
0
0
2007-02-28
0
0
0