TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 196

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

3.14.2
Timer out TA3OUT
CPU address bus:
Internal data bus
System clock
CPU BUSAK
Output
Internal data bus
A0 to A23
Block Diagram
32 kHz clock
Internal
Data bus
COM register
FP register
Register (10 bits)
SEG register
LCDSAH/L
generate
To interrupt circuit
SR,<BUS1:0>
SCP
(Rising edge)
<TA3LCDE>
EMCCR0
Figure 3.14.1 LCDC Block Diagram
Increment (14 bits)
Counter (9 bits)
BCD generate
FR generate
Comparator
Shift register
Inc. (14 bits)
LP generate
<BUS1:0>
Lower address
<BUS1:0>
counter
COM
SEG
91C025-195
Clear
Selector
<START>
SEGEND
R
S
Q
RD, <BUS1:0>
LP modify
SCPEN
Latch,
shifter
MMU
BUSRQ
SCPEN &
D3BFR
RD
D1BSCP
A0 to A23
DLEBCD
D2BLP
D0 to D7
TMP91C025
2007-02-28