TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 6

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

AN3/MY/
AN0, AN1 (P80, P81)
SCLK0/
TA1OUT/KO1 (PA1)
TA3OUT/KO2 (PA2)
SCLK1/
TA0IN/INT1 (PB4)
VREFH, VREFL
DLEBCD (PD3)
D1BSCP (PD0)
PX/INT2 (PB5)
PY/INT3 (PB6)
AN2/MX (P82)
DOFFB (PD4)
D3BFR (PD2)
ADTRG
D2BLP (PD1)
AVCC, AVSS
RXD0 (PC1)
RXD1 (PC4)
TXD0 (PC0)
CTS
TXD1 (PC3)
CTS (PC5)
0
1
(PC2)
(P83)
10-bit 4-channel
SIO/UART/IrDA
Touch screen
SIO/UART
8-bit timer
8-bit timer
8-bit timer
8-bit timer
converter
(TMRA0)
(TMRA1)
(TMRA2)
(TMRA3)
controller
I/F (TSI)
(SIO0)
(SIO1)
Port B
Port C
Port D
Port 6
Port 8
Port 9
Port A
LCD
Figure 1.1 TMP91C025 Block Diagram
AD
XWA
XBC
XDE
XHL
XSP
XIX
XIY
XIZ
CPU (TLCS-900/L1)
(Watchdog timer)
91C025-4
SR
WDT
32 bits
PC
W A
B
D
H
SP
IX
IY
IZ
C
E
L
F
Clock doubler
Clock gear,
(4 blocks)
Keyboard
alarm out
CS/WAIT
controller
controller
Interrupt
Melody/
H-OSC
L-OSC
Port Z
Port 1
Port 2
Port 5
MMU
RTC
I/F
( ): Initial function after reset
KO0/
(PA0)
KO1/TA1OUT (PA1)
KO2/TA3OUT (PA2)
KO3 (PA3)
DVCC [2]
DVSS [2]
X1
X2
EMU0
EMU1
XT1
XT2
AM0
AM1
D0 to D7
A0 to A7
A8 to A15
P10 to P17 (D8 to D15)
P20 to P27 (A16 to A23)
R/
(P60 to P63)
EA24/
EA25/
INT0 (
INT0 to INT3
(PB3 to PB6)
KI0 to KI7 (P90 to P97)
MLDALM (PD7)
(PA0)
RESET
RD
WR
HWR
WAIT
CS
ALARM
W
0
/
to
ALARM
(PZ2)
(P56)
CS
CS
PS
SRWR
/
CS
MLDALM
2
2
TMP91C025
)
B
C
3
2007-02-28
/
/
,
/
SRUB
CS
(PZ3)
SRLB
MLDALM
2
A
/KO0
(P64)
(P65)