TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 5

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
(20) Triple-clock controller
(21) Operating voltage
(22) Package
Clock doubler (DFM) circuit is inside
Clock gear function: Select a high-frequency clock fc/1 to fc/16
SLOW mode (fs = 32.768 kHz)
V
V
V
100-pin QFP: P-LQFP100-1414-0.50F, chip form supply also available. For details, contact
your local Toshiba sales representative.
CC
CC
CC
= 3.0 V to 3.6 V (fc max = 36 MHz)
= 2.7 V to 3.6 V (fc max = 27 MHz)
= 2.4 V to 3.6 V (fc max = 16 MHz)
91C025-3
TMP91C025
2007-02-28

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