TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 229

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

Note: Since the CPU accesses the internal area to write data to a port, the control signals of external pins
(4) Write cycle
EA24 to EA25,
such as
as depicting internal operation. Please also note that the timing and AC characteristics of port
input/output shown above are typical representation. For details, contact your local Toshiba sales
representative.
Port output
WR
D0 to D15
A23 to A0
SRWR
SRUB
,
SRLB
(Note)
WAIT
HWR
R/
f
CSn
FPH
WR
W
and
CS
are not enabled. Therefore, the above waveform diagram should be regarded
t
SAS
91C025-228
t
WW
t
t
APO
SBW
t
DW
t
t
D0 to D15
SWP
SDS
t
CAW
t
WD
t
t
SWR
SDH
TMP91C025
SRUB
SRLB
2007-02-28