TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 165

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

AN3/
Analog input
3.11 Analog/Digital Converter
ADTRG
AN2 (P82)
AN1 (P81)
AN0 (P80)
converter (AD converter) with 4-channel analog input.
AN3) are shared with the input only port 4 and can thus be used as an input port.
Note: When IDLE2, IDLE1 or STOP mode is selected, so as to reduce the power, with some
VREFH
VREFL
(P83)
The TMP91C025 incorporates a 10-bit successive approximation type analog/digital
Figure 3.11.1 is a block diagram of the AD converter. The 4-channel analog input pins (AN0 to
AD mode control register 1 ADMOD1
ADMOD1
<ADCH2:0>
timings the system may enter a standby mode even though the internal comparator is still
enabled. Therefore be sure to check that AD converter operations are halted before a HALT
instruction is executed.
Channel
selector
<VREFON>
Figure 3.11.1 Block Diagram of AD Converter
<ADTRGE>
Sample and
91C025-163
hold
<EOCF><ADBF><ITM0><REPEAT><SCAN><ADS>
Internal data bus
End
AD mode control register 0 ADMOD0
Busy
DA converter
Comparator
Interrupt
+
−
AD converter control
Repeat
circuit
Scan
Start
ADREG04H to ADREG37H
INTAD
interrupt
ADREG04L to ADREG37L
AD conversion result
ADTRG
TMP91C025
2007-02-28
register