TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 168

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

ADREG04H
ADREG15H
ADREG04L
ADREG15L
(02A0H)
(02A1H)
(02A2H)
(02A3H)
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Channel x
conversion result
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Stores lower 2 bits of
AD conversion result.
Stores lower 2 bits of
AD conversion result.
ADR01
ADR09
ADR11
ADR19
7
7
7
7
Undefined
Undefined
Figure 3.11.4 AD Converter Related Registers
R
R
ADREGxH
9
AD Conversion Data Lower Register 0/4
AD Conversion Data Upper Register 0/4
AD Conversion Data Lower Register 1/5
AD Conversion Data Upper Register 1/5
ADR00
ADR10
ADR08
ADR18
7
6
6
6
6
8
6
7
5
ADR07
ADR17
Stores upper 8 bits of AD conversion result.
4
6
Stores upper 8 bits AD conversion result.
5
5
5
5
91C025-166
• Bits 5 to 1 are always read as 1.
• Bit0 is the AD conversion data storage flag <ADRxRF>. When the AD
3
conversion result is stored, the flag is set to 1. When either of the
registers (ADREGxH, ADREGxL) is read, the flag is cleared to 0.
5
2
4
ADR06
ADR16
1
4
4
4
4
3
Undefined
Undefined
0
R
R
2
ADR05
ADR15
1
7
3
3
3
3
0
6
5
ADR04
ADR14
2
2
2
2
4
3
2
ADR03
ADR13
1
1
1
1
ADREGxL
1
0
AD
conversion
data storage
flag.
1: Conversion
AD
conversion
result flag.
1: Conversion
TMP91C025
ADR0RF
2007-02-28
ADR1RF
result
stored
result
stored
ADR02
ADR12
0
R
0
0
0
0
R
0