TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 63

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
PZCR
(007EH)
PZ
(007DH)
PZFC
(007FH)
Note 1: Output latch register is set to 1.
Note 2: Read-modify-write is prohibited
Note 3: When port Z is used in Input
for registers PZCR and PZFC.
mode, the PZ register controls
the
Read-modify-write is prohibited
in input mode or I/O mode.
Setting
resistor may be depended on
the states of the input pin.
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
built-in
the
pull-up
built-in
7
7
7
resistor.
pull-up
6
6
6
R/W,
<PZ3F>
Figure 3.5.6 Registers for Port Z
<PZ3C>
SRWR
0
1
Port Z function register
Port Z control register
5
5
5
setting
Port Z register
91C025-61
Input
R
0
/
W
4
4
4
Output
SRWR
Data from external port
0(Output latch register)
: Pull-up resistor OFF
1(Output latch register)
: Pull-up resistor ON
0: Port
1:
1
PZ3C
0: Input 1: Output
PZ3F
R/
SRWR
PZ3
3
0
3
3
0
W
,
R/W
W
W
0: Port
1:
PZ2C
(Note 1)
HWR
PZ2F
PZ2
2
2
0
2
0
1
1
1
TMP91C025
0
0
0
2007-02-28

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