TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 167

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

ADMOD1
(02B1H)
Bit symbol
Read/Write
After reset
Function
Note:
As pin AN3 also functions as the
< ADTRGE> = 0.
VREF
application
control.
0: Off
1: On
VREFON
R/W
7
0
Figure 3.11.3 AD Converter Related Registers
IDLE2
0: Stop
1: Operate
I2AD
R/W
6
0
AD Mode Control Register 1
5
<ADCH2:0>
ADTRG
91C025-165
100 to 111
011 (Note)
000
001
010
input pin, do not set <ADCH2:0> = 011 when using
4
<SCAN>
AD
external
trigger start
control.
0: Disable
1: Enable
ADTRGE
Analog input channel selection.
AD conversion starts control by external trigger.
(
IDLE2 control
Control of application of reference voltage to
AD converter.
Before starting conversion (Before writing 1 to
ADMOD0<ADS>), set the <VREFON> bit to 1.
3
0
0
1
0
1
0
1
ADTRG
Channel
fixed
AN0
AN1
AN2
AN3
Disabled
Enabled
Stopped
In operation
Off
On
−
0
Analog input channel selection.
input)
ADCH2
2
0
Use prohibition
AN0
AN0 → AN1
AN0 → AN1 → AN2
AN0 → AN1 → AN2 → AN3
R/W
ADCH1
1
0
scanned
Channel
1
ADCH0
TMP91C025
ADTRG
0
0
2007-02-28
with