TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 125

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
3.9
Serial Channels
(Asynchronous transmission) or I/O Interface mode (Synchronous transmission) can be
selected.
• I/O interface mode
• UART mode
master controller start slave controllers via a serial link (A multi-controller system).
operation of channel 0 is explained below.
TMP91C025 includes 2 serial I/O channels. For both channels either UART mode
In mode 1 and mode 2 a parity bit can be added. mode 3 has a wakeup function for making the
Figure 3.9.2, Figure 3.9.3 are block diagrams for each channel.
Serial channels 0 and 1 can be used independently.
Both channels operate in the same fashion except for the following points; hence only the
This chapter contains the following sections:
3.9.1
3.9.2
3.9.3
3.9.4
3.9.5
Pin name
IrDA mode
Block Diagrams
Operation of Each Circuit
SFRs
Operation in Each Mode
Support for IrDA
Table 3.9.1 Differences between Channels 0 to 1
TXD0 (PC0)
RXD0 (PC1)
CTS
0
Channel 0
/SCLK0 (PC2)
Yes
Mode 0: For transmitting and receiving I/O data using the
Mode 1: 7-bit data
Mode 2: 8-bit data
Mode 3: 9-bit data
91C025-123
synchronizing signal SCLK for extending I/O.
TXD1 (PC3)
RXD1 (PC4)
CTS
1
/SCLK1 (PC5)
Channel 1
No
TMP91C025
2007-02-28

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