TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 115

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
EMCCR0
(00E3H)
Bit symbol
Read/Write
After reset
Function
(6) LCDC and MELODY/ALARM circuit supply mode
Operate
STOP
a. Clock generate by timer 3
b. Clock supply start (EMCCR0 <TA3LCDE> = 1)
c. Need setup time
d. LCDC or MELODY/ALARM start to operate
e. LCDC or MELODY/ALARM stop to operate
f. Clock supply cut off (<TA3LCDE> = 0 or <TA3MLDE> = 0)
source clock TA3 clock generated by TMRA3. But this function is special mode, without
low clock (XTIN, XTOUT) so keep the rule under below.
This function can operate only TMRA3. It can use LCDC and MELODY/ALARM
Protect flag
0: Off
1: On
PROTECT
7
R
0
LCDC source
CLK
0: 32 kHz
1: TA3OUT
TA3LCDE
R/W
6
0
Address hold
0: Normal
1: Enable
AHOLD
R/W
5
0
91C025-113
Melody/Alarm
source clock.
0: 32 kHz
1: TA3OUT
TA3MLDE
R/W
4
0
Always write
0.
R/W
3
0
1: External
clock
EXTIN
R/W
2
0
fc oscillator
driver ability.
1: Normal
0: Weak
DRVOSCH
R/W
1
1
fs oscillator
driver ability.
1: Normal
0: Weak
DRVOSCL
R/W
TMP91C025
0
1
2007-02-28

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