TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 121

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

;Initial Setting
;CS0
;CS1
;CS2
;CS3
;CSX
;Port
to
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
LD
of the above.
example, it set 1-wait setting. In the same way
16-bit bus and 0 waits,
memory size, need to set that logical address size: fitting to each local area. Actual physical
address is set by each area’s BANK register setting.
Secondly, Figure 3.8.5 shows example of initial setting at BANK operation S/W example1
Because
By CS/WAIT controller, each chip selection signal’s memory size, don’t set actual connect
CSEX setting of CS/WAIT controller is except above CS0 to CS3’s setting.
Finally pin condition is set. Port 60 to 65 set to
(MSAR0), 00H
(MAMR0), FFH
(B0CS), 89H
(MSAR1), 40H
(MAMR1), FFH
(B1CS), 80H
(MSAR2), C0H
(MSAR3), 80H
(BEXCS), 00H
(P6FC), 3FH
(MAMR2), 7FH
(B2CS), C3H
(MAMR3), 7FH
(B3CS), 85H
CS
0
connect to RAM: 8-bit bus, 8 Mbytes, it need to set 8-bit bus. At this
Figure 3.8.5 Bank Operation S/W Example 1
; Logical address area: 000000H to 1FFFFFH
; Logical address size: 2 Mbytes
; Condition: 8-bit, 1 waits (8 Mbytes, SRAM)
; Logical address area: 400000H to 7FFFFFH
; Logical address size: 4 Mbytes
; Condition: 16-bit, 2 waits (16 Mbytes, Flash ROM)
; Logical address area: C00000H to FFFFFFH
; Logical address size: 4 Mbytes
; Condition: 16-bit, 0 waits (16 Mbytes, MROM)
; Logical address area: 800000H to BFFFFFH
; Logical address size: 4 Mbytes
; Condition: 16-bit, 3 waits (64 Mbytes, MROM)
; Other: 16-bit, 2 waits (Don’t care)
;
CS
CS
3
0
set 16-bit bus and 3 waits.
to
91C025-119
CS
3
, EA24, EA25: port 6 setting
CS
CS
1
0
set to 16-bit bus and 2 waits,
, 1, 2, 3, EA24, EA25.
TMP91C025
2007-02-28
CS2
set