TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 141

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

(0209H)
SC1CR
Bit symbol
Read/Write
After reset
Function
Note: As all error flags are cleared after reading do not test only a single bit with a bit testing instruction.
Received
data bit8.
Undefined
RB8
7
R
Figure 3.9.10 Serial Control Register (SIO1, SC1CR)
Parity
0: Odd
1: Even
EVEN
6
0
R/W
Parity
addition.
0: Disable
1: Enable
PE
5
0
91C025-139
Overrun
OERR
R (Cleared to 0 when read.)
4
0
1: Error
PERR
Parity
0
3
I/O interface input clock select
Edge selection for SCLK pin (I/O mode)
Framing error flag
Parity error flag
Overrun error flag
Framing
0
1
0
1
Parity addition enables
Even parity addition/check
Received data bit8
FERR
0
1
0
1
2
0
Baud rate generator
SCLK1 pin input
Transmits and receive
data on rising edge of SCLK1.
Transmits and receive
data on falling edge of SCLK1.
Disabled
Enabled
Odd parity
Even parity
0: SCLK1
1: SCLK1
SCLKS
1
0
R/W
0: Baud rate
1: SCLK1
generator
pin input
IOC
TMP91C025
0
0
2007-02-28
Cleared to 0
when read