TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 239

no-image

TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
Symbol
PA
PB
PC
PD
P1
P2
P5
P6
P8
P9
PZ
(1) I/O ports
Port 1
Port 2
Port 5
Port 6
Port 8
Port 9
Port A
Port B
Port C
Port D
Port Z
Name
Address
0DH
1EH
7DH
01H
06H
12H
18H
19H
22H
23H
29H
PD7
R/W
P17
P27
P97
7
1
1
0 (Output latch
: Pull-up
1(Output latch
: Pull-up
(Output latch
external port
Data from
register is
register)
resistor OFF
register)
resistor ON
set to 1).
R/W
PB6
P16
P26
P56
P96
1
6
1
Data from external port (Output latch register is cleared to 0).
(Output latch register is set to 1).
91C025-237
Data from external port
PC5
P15
P25
P65
P95
PB5
1
5
1
1
Data from external port (Output latch register is set to 1).
R/W
Data from external port.
PC4
PD4
P14
P24
P64
P94
PB4
1
4
1
1
1
R/W
R/W
R
(Output latch register is
Data from external port
0 (Output latch register)
: Pull-up resistor OFF
1(Output latch register)
: Pull-up resistor ON
PC3
PD3
PA3
PB3
PZ3
P13
P23
P63
P83
P93
1
1
3
1
1
1
set to 1”
R/W
R/W
R/W
Data from external port.
R/W
PC2
PD2
P12
P22
P62
P82
P92
PA2
PZ2
1
2
1
0
1
R/W
R
PA1
PC1
PD1
P11
P21
P61
P81
P91
TMP91C025
1
1
1
1
1
2007-02-28
PA0
PC0
PD0
P10
P20
P60
P80
P90
1
0
1
1
1

Related parts for TMP91xy25FG