TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 135

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
Timing to writing to the
transmission buffer
Note 1: If the
Note 2: Transmission starts on the first falling edge of the TXDCLK clock after the
transmission.
Handshake function
TXDCLK
SIOCLK
errors can be avoided. The handshake functions is enabled or disabled by the
SC0MOD<CTSE> setting.
transmission is halted until the
interrupt is generated, it requests the next data send to the CPU. The next data is
written in the transmission buffer and data sending is halted.
setting any port assigned to be the
to request send data halt after data receive is completed by software in the RXD
interrupt routine.
Use of
When the
Though there is no
TXD
CTS
CTS
signal goes high during transmission, no more data will be sent after completion of the current
[a]
CTS
Send is suspended
during this period
Figure 3.9.6
TMP91C025
CTS
Sender
Figure 3.9.5 Handshake Function
pin allows data can be sent in units of one frame; thus, Overrun
0
13
CTS
TXD
pin foes high on completion of the current data send, data
RTS
14
91C025-133
CTS
[b]
pin, a handshake function can be easily configured by
15
(Clear to send) Timing
16
CTS
RTS
0
1
pin foes low again. However, the INTTX0
function. The
RXD
RTS
Start bit
2
TMP91C025
Receiver
(Any port)
3
CTS
RTS
14
signal has fallen.
should be output high
15
16
TMP91C025
2007-02-28
1
Bit0
2
3

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