TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 175

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
3.12 Watchdog Timer (Runaway detection timer)
Internal reset
3.12.1
(f
FPH
CPU has started to malfunction (Runaway) due to causes such as noise.
INTWD to notify the CPU. Connecting the watchdog timer output to the Reset pin internally
forces a reset. (The level of external
f
SYS
The TMP91C025 features a watchdog timer for detecting runaway.
The watchdog timer (WDT) is used to return the CPU to normal state when it detects that the
When the watchdog timer detects a malfunction, it generates a non-maskable interrupt
/2)
Configuration
Figure 3.12.1 is a block diagram of he watchdog timer (WDT).
Note: It needs to care designing the total machine set, because Watchdog timer can’t
WDMOD
<WDTP1:0>
operate completely by external noise.
Binary counter
Figure 3.12.1 Block Diagram of Watchdog Timer
(22 stage)
2
15
WDT control register WDCR
2
17
Selector
Write
4EH
2
Internal data bus
19
Reset
2
21
91C025-173
RESET
Write
B1H
pin is not changed.)
WDMOD<RESCR>
R
WDMOD<WDTE>
Reset control
Q
S
WDTI interrupt
Internal reset
RESET
TMP91C025
2007-02-28

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