TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 195

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TMP91xy25FG

Manufacturer Part Number
TMP91xy25FG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP91xy25FG

Package
LQFP100
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
Ramless
Architecture
16-bit CISC
Usb/spi Channels
-
Uart/sio Channels
2
I2c/sio Bus Channels
-
(s)dram Controller
-
Adc 10-bit Channel
4
Da Converter
-
Timer 8-bit Channel
4
Timer 16-bit Channel
-
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
49
Power Supply Voltage(v)
3.0 to 3.6
3.14.1
The number of picture
elements can be handled
Receiver data bus width
Transfer data bus width
Transfer rate
(at f
External
pins
FPH
= 16 MHz)
Feature of LCDC of Each Mode
Each feature and operation of pin is as follows.
Data Bus:
(D7 to D0)
Write Strobe:
(
Address Bus:
(A0)
Shift Clock
Pulse:
(D1BSCP)
Latch Pulse:
(D2BLP)
Frame:
(D3BFR)
Cascade Pulse:
(DLEBCD)
Display Off:
(
DOFF
WR
)
)
Table 3.14.1 Feature of LCDC of Each Mode
Shift-register Type LCD Driver Control
Common (row):
Segment (column): 32, 64, 80, 120, 128,
8 bits, 16 bits selectable
8 bits, 4 bits selectable
250 ns/1 byte at Byte mode
375 ns/1 byte at Nibble mode
Data bus: Connect with DI pin of column driver.
Upper 7 pins do not use in byte mode and
upper 4 pins do not use in nibble mode.
not used
not used
Shift clock pulse: Connect with SCP pin of
column driver. LCD driver latches data bus
value by falling edge of this pin.
Latch pulse output: Connect with LP/EIO1 pin
of column/row driver. Display data is latched in
output buffer in LCD driver by rising edge of
this pin.
LCD frame output: Connect with FR pin of
column/row driver.
Cascade pulse output: Connect with DIO1 pin
of row driver. This pin outputs 1 shot pulse by
every D3BFR pin changes.
Display off output: Connect with /DSPOF terminal of column/row driver.
L means display off and H means display on.
91C025-194
Mode
64, 68, 80, 100, 120,
128, 144, 160, 200, 240
160, 240, 320, 360
There is not a limitation
8 bit, 16 bit, selectable
(depend on CPU command)
8-bit fixed
Equal to memory cycle
Data bus: Connect with DB pin of
column/row driver.
Write strobe: Connect with /WR pin of
column/row driver.
Address 0: Connect with D/I pin of
column driver.
When A0 = 1 data bus value means
display data, when A0 = 0 data bus
means instruction data.
Chip enable for column driver 1:
Connect with
Chip enable for column driver 2:
Connect with
Chip enable for column driver 3:
Connect with/
Chip enable for row driver:
Connect with
RAM Built-in Type LCD Driver
Control Mode
CE
CE
CE
LE
pin of row driver.
pin of column driver 1.
pin of column driver 2.
pin of column driver 3.
TMP91C025
2007-02-28

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