TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 169

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

ADREG26H
ADREG37L
ADREG37H
ADREG26L
(02A5H)
(02A6H)
(02A7H)
(02A4H)
Bit symbol
Read/Write
After reset
Function
Channel x conversion
result
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Bit symbol
Read/Write
After reset
Function
Stores lower 2 bits of
AD conversion result.
Stores lower 2 bits of
AD conversion result.
ADR39
ADR21
ADR29
ADR31
7
7
7
7
Undefined
Undefined
Figure 3.11.5 AD Converter Related Registers
R
R
ADREGxH
AD Conversion Result Lower Register 2/6
AD Conversion Result Upper Register 3/7
9
AD Conversion Data Upper Register 2/6
AD Conversion Data Lower Register 3/7
ADR38
ADR30
ADR20
ADR28
7
6
6
6
6
8
6
7
5
ADR37
Stores upper 8 bits of AD conversion result.
ADR27
Stores upper 8 bits of AD conversion result.
4
5
6
5
5
5
91C025-167
• Bits 5 to1 are always read as 1.
• Bit0 is the AD conversion data storage flag <ADRxRF>. When the AD
3
conversion result is stored, the flag is set to 1. When either of the
registers (ADREGxH, ADREGxL) is read, the flag is cleared to 0.
5
2
ADR36
4
ADR26
4
1
4
4
4
Undefined
3
Undefined
0
R
R
2
ADR35
ADR25
3
1
7
3
3
3
0
6
ADR34
5
ADR24
2
2
2
2
4
3
ADR33
2
ADR23
1
1
1
1
ADREGxL
1
0
ADR32
AD
conversion
data storage
flag.
1: Conversion
TMP91C025
AD
conversion
data storage
flag.
1: Conversion
2007-02-28
ADR3RF
ADR2RF
result
stored
result
stored
0
ADR22
0
R
0
0
R
0
0