TMP91xy25FG Toshiba, TMP91xy25FG Datasheet - Page 64

• Manufacturer Part Number: TMP91xy25FG
• Manufacturer: Toshiba

Specifications of TMP91xy25FG

• Package: LQFP100
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: Ramless
• Architecture: 16-bit CISC
• Usb/spi Channels: -
• Uart/sio Channels: 2
• I2c/sio Bus Channels: -
• (s)dram Controller: -
• Adc 10-bit Channel: 4
• Da Converter: -
• Timer 8-bit Channel: 4
• Timer 16-bit Channel: -
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 49
• Power Supply Voltage(v): 3.0 to 3.6

3.5.4
Port 5 (P56)
P5FC. Resetting sets all bits of the output latch P5 to 1.
the CPU’s control/status signal.
Port 5 is an 1-bit general-purpose I/O port. I/O is set using control register P5CR and
In addition to functioning as a general-purpose I/O port, port 5 also functions as I/O for
Resetting initializes P56 pins to input mode with pull-up resistor.
Direction control
(on bit basis)
P5CR write
P5 write
Output
Reset
Latch
Internal
S
WAIT
Figure 3.5.7 Port 5 (P56)
91C025-62
P5 read
Output buffer
P-ch (Programmable pull up)
P56 (
WAIT
TMP91C025
)
2007-02-28